An adaptive voltage scaling DC–DC converter based on embedded pulse skip modulation

摘要

An adaptive voltage scaling (AVS) DC–DC converter based on embedded pulse skip modulation (PSM) is presented in this paper. As AVS technique developing, the supply voltage of digital circuits can be scaled adaptively with the changing of operation frequency and working environment. The critical path replica (CPR) is widely used in AVS implementation. The worst-case margin is relaxed by probing and tracking the CPR delay time of target applications. Consequently, the energy consumption of digital circuits is decreased significantly with supply voltage reduced. At the same time, in order to improve the efficiency of DC–DC converter especially in light load, the PSM mode has been used in proposed circuit structure. The circuit of AVS DC–DC converter based on embedded PSM has been implemented and fabricated in a standard 0.13 μm CMOS process which occupies 1.2 mm2 active silicon areas. The experimental results show that, the output voltage of the DC–DC converter is well regulated from 0.6 to 1.5 V when the clock frequency varies within the range of 30–150 MHz. The maximum energy saving of 83 % is obtained with the proposed circuit structure compared to the traditional fixed voltage.