Using Multicore Reuse Distance to Study Coherence Directories

摘要

Researchers have proposed numerous techniques to improve the scalability of coherence directories. The effectiveness of these techniques not only depends on application behavior, but also on the CPU's configuration, for example, its core count and cache size. As CPUs continue to scale, it is essential to explore the directory's application and architecture dependencies. However, this is challenging given the slow speed of simulators. While it is common practice to simulate different applications, previous research on directory designs have explored only a few-and in most cases, only one-CPU configuration, which can lead to an incomplete and inaccurate view of the directory's behavior.