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High-Performance Two-Dimensional InSe Field-Effect Transistors with Novel Sandwiched Ohmic Contact for Sub-10 nm Nodes: a Theoretical Study

机译:新型夹层欧姆接触的亚二维小于10 nm节点的高性能二维InSe场效应晶体管:理论研究

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摘要

Two-dimensional (2D) InSe-based field effect transistor (FET) has shown remarkable carrier mobility and high on-off ratio in experimental reports. Theoretical investigations also predicated the high performance can be well preserved at sub-10 nm nodes in the ballistic limit. However, both experimental experience and theoretical calculations pointed out achieving high-quality ohmic has become the main limiting factor for high-performance 2D FET. In this work, we proposed a new sandwiched ohmic contact with indium for InSe FET and comprehensively evaluated its performance from views of material and device based on ab initio methods. The material properties denote that all of fundamental issues of ohmic contact including tunneling barrier, the Schottky barrier, and effective doping are well concerned by introducing the sandwiched structure, and excellent contact resistance was achieved. At device performance level, devices with gate length of 7, 5, and 3 nm were investigated. All metrics of sandwiched contacted devices far exceed requirement of the International Technology Roadmap for Semiconductors (ITRS) and exhibit obvious promotion as compared to conventional structures. Maximum boost of current with 69.4%, 50%, and 49% are achieved for devices with 7, 5, and 3 nm gate length, respectively. Meanwhile, maximum reduction of the intrinsic delay with 20.4%, 16.7%, and 18.9% are attained. Moreover, a benchmark of energy-delay product (EDP) against other 2D FETs is presented. All InSe FETs with sandwiched ohmic contact surpass MoS2 FETs as well as requirement from ITRS 2024. The best result approaches the upper limit of ideal BP FET, denoting superior preponderance of sandwiched structures for InSe FETs in the next generation of complementary metal-oxide semiconductor (CMOS) technology.
机译:二维(2D)基于InSe的场效应晶体管(FET)在实验报告中显示出显着的载流子迁移率和高通断比。理论研究还预测,在弹道极限内,低于10 nm的节点可以很好地保留高性能。但是,实验经验和理论计算均指出,获得高质量的欧姆已成为高性能2D FET的主要限制因素。在这项工作中,我们为InSe FET提出了一种新型的铟与铟的夹层欧姆接触,并基于从头开始的方法从材料和器件的角度全面评估了其性能。材料性能表明,通过引入夹层结构,欧姆接触的所有基本问题(包括隧道势垒,肖特基势垒和有效掺杂)都得到了充分关注,并获得了出色的接触电阻。在器件性能水平上,研究了栅极长度为7、5和3 nm的器件。夹层接触式器件的所有指标都远远超过了《国际半导体技术路线图》(ITRS)的要求,并且与传统结构相比,具有明显的提升。栅极长度分别为7、5和3 nm的器件分别实现了69.4%,50%和49%的最大电流提升。同时,最大程度地减少了固有延迟,分别为20.4%,16.7%和18.9%。此外,提出了相对于其他2D FET的能量延迟积(EDP)基准。所有具有夹层欧姆接触的InSe FET都超过了MoS2 FET并达到了ITRS 2024的要求。最佳结果接近理想BP FET的上限,这表明下一代互补金属氧化物半导体(InSe FET)的夹层结构具有优越的优势( CMOS)技术。

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