VHDL在计算机组成原理实验中的应用研究

摘要

结合工程实际应用和现代硬件系统的设计方法,应用VHDL对组成原理实验中的主要器件进行逻辑设计,将现有的计算机组成原理实验课程的实验内容、实验方式、实验过程进行设置与优化.在计算机组成原理实验教学环节中引入VHDL及FPGA技术,能够起到促进课程内容学习及培养专业能力的双重效果.%Combined with engineering application and design method of modern hardware system, VHDL was used to make logic design for the main component in principles of computer composition to design and optimize experimental content, method, and process of existing experiment course of computer composition principle. The introduction of VHDL and FPGA technology into experimental teaching can both promote to learn course content and cultivate professional ability.