基于锁相环原理的915MHz信号发生器设计

摘要

基于锁相环原理设计研制一款915MHz信号发生器.发生器由锁相环路和功率放大器两部分组成,锁相环路由频率合成芯片ADF4153、无源三阶滤波器、压控振荡器VCO190-915TY构成,功率放大器采用功放管MW6S004NT设计实现.利用ADS软件分别建立锁相环和功率放大器模型,完成功率放大器的阻抗匹配设计,并进行性能仿真,最终实现了信号发生器的硬件样品.仿真结果显示,信号发生器在915MHz处S21为24.205dB,输出功率1dB压缩点为37.022dBm.样件实物测试表明,信号发生器在915MHz处频率稳定,输出功率达到14.904dBm,整体性能良好.%A 915MHz signal generator based on PLL principle is designed in this paper. The generator consists of PLL and power amplifier. And the PLL consists of frequency synthesizer chip ADF4153, passive third-order filter and VCO190-915TY voltage-controlled oscillator.The power amplifier is designed by power amplifier tube MW6S004NT. The ADS software is used to establish the model of phase locked loop and power amplifier, and complete the impedance matching design of power amplifier. After the performance simulation, the hardware sample of signal generator is realized finally. The simulation results show that the signal generator's S21 at 915MHz is 24.205dB, and its output power of 1dB compression point is 37.022 dBm. The physical test results show that the signal generator is stable at 915MHz, its output power is 14.904dBm, and its overall performance is good.