直接隧穿栅电流对CMOS逻辑电路的影响

摘要

对于纳米级的CMOS电路，由于MOS器件具有超薄的氧化层，栅隧穿漏电流的存在严重地影响了电路的正常工作。本文基于可靠性理论和电路级仿真深入地研究直接隧穿电流对CMOS逻辑电路的影响。仿真结果很好地与理论分析相符合，这些理论和仿真将有助于以后的集成电路设计。%In nanometer CMOS technologies, normal operation of circuit is seriously affected by gate tunneling leakage currents with ultra-thin gate oxide of MOSFETs. Based on reliability theory and circuit-level simulation, the impact of direct tunneling （DT） gate leakage current on CMOS logic circuits is studied in depth. The experiments show that simulation results well agree with theoretical analysis, and the theory and simulation will contribute to future inte- grated circuit design.