锁存器和触发器振荡问题分析

摘要

Latch and flip flop are the building blocks of the sequential logic circuit. And S-R latch is the main blocks of latch and flip flop. The oscilation of S-R latch has been explored and analyzed by the timing diagram of the circuit inputs and outputs. Thus the oscilation mechanism of latch and flip flop has been researched,which helps to avoid the oscilation problem and also helps to design a reliable digital system.%锁存器和触发器是时序逻辑电路的基本构件，而S-R锁存器是锁存器和触发器的构成基础。借助电路输入输出时序关系，本文探析了S-R锁存器出现振荡的本质原因，这一探讨有助于避免振荡问题的产生，也有助于数字系统的可靠性设计。