基于闪存阵列的缓存容量确定方法

摘要

针对低成本、小型化的数据记录系统的应用,提出了一种数据缓存技术解决方案。存储模块是由闪速存储器芯片（NAND Flash）组成的存储阵列,以FPGA为载体的SOPC系统作为存储模块的控制核心。分析存储系统的结构及控制平台的实现过程,并对系统工作原理及并行分路技术进行讨论。深入研究Flash阵列的存储过程,提出最小FIFO缓存容量的设计,利用FPGA内部的RAM资源构建了最小容量的FIFO。系统保持高速存储的同时,利用了相对较小的资源,降低了系统的成本,提高了系统的效率。通过测试最后能得出对应的闪存阵列只需%For low cost,small application of the data recording system,a data cache technology solutions.Flash memory storage module is a chip （NAND Flash） consisting of storage arrays,the FPGA SOPC as the carrier control system as the core of memory modules.Analysis of the structure of the storage system and control platform for the realization of the process,and the system works and discuss the parallel splitting technology.Flash array depth study of the storage process,propose to minimize the FIFO cache design,the use of FPGA resources to build the internal RAM minimum capacity of FIFO.While maintaining high-speed storage system,using a relatively small resources,reducing system cost and improve the efficiency of the system.