一种变时间常数自动增益控制环路与算法设计

摘要

针对时间常数恒定的自动增益控制环路的不足，设计了一种时间常数可变的自动增益控制结构，实现了环路响应时间能够自适应地随着输入信号的增大而减小，在一定程度上克服了恒定时间常数自动增益控制环路的不足。给出了其核心算法并进行了详细推导，在理论上证明了该结构的稳定性以及算法的有效性。最后，对提出的结构以及算法进行了仿真。仿真结果表明，本文所设计的结构与提出的算法既能对大电平信号迅速响应，又能保证足够小的反调制失真。%For the shortcoming of loop of AGC of constant response time, design an architecture of AGC of variable response time that can implement the aim that the loop＇s response time decreases as input signal＇s amplitude arises, overcome the shortcoming of constant response time AGC. Give the core algorithm and detailed deduction, proves the architecture＇s stability and the algorithm＇s validity. At last, simulate the architecture and algorithm and it shows the designed architecture and algorithm not only can response rapidly to high level signal, but also guarantee the small enough against a distortion.