密勒调制副载波编解码器的FPGA实现

摘要

In the UHF literacy inverter system design based on ISO/IEC18000-6C protocol,miller sub-carrier modulation encoding and decoding design is the key technology.First,the encoding and decoding characteristics of miller sub-carrier modulation is reseached.Then a miller sub-carrier modulation encoding and decoding design based on FPGA and Verilog HDL language is designed and realized by EP1C12Q chip belonging to Cyclone I series of Altera Company.Simulation results show that the Miller sub-carrier modulation r encoding and decoding design based on FPGA can make the encode and decode module output exactly right and process speedly,and encoding and decoding design meets high efficiency,extensible,convenient integration and so on.%在基于ISO/IEC18000-6C协议的超高频读写器系统设计中,密勒调制副载波编解码设计是超高频读写器系统设计中的关键技术之一。在研究密勒调制副载波序列特点的基础上,提出一种基于FPGA并运用VerilogHDL硬件描述语言实现的密勒调制副载波编解码设计方法,并利用Altera公司CycloneI系列EP1C12Q芯片与Verilog HDL硬件描述语言实现。仿真结果表明,采用FPGA完成密勒调制副载波编解码设计,编解码模块输出完全正确,处理速度快,达到了设计预期要求,编解码设计具有效率高、扩展性强、方