基于FPGA的Σ-△型模数转换器的仿真研究

摘要

By analysing the principle of sigma-delta (Σ-△) analog to digital converter (ADC),this paper put forward a high precision ADC solution with a field programmable gate array(FPGA) chip.The method used the low voltage differential voltage signal interface(LVDS) within FPGA,along with a minimum number of external RC components and an oversampling digital filter,a two-order Σ-△ ADC can be implemented inside the FPGA devices.Matlab/Simulink simulation results show that the output signal has a signal-to-noise distortion ratio(SNDR) of 86.7dB and an effective number of bits(ENOB) of 14bits,which meets the performance of the ADC.It was also successfully verified by the EDA tool simulation.The method proves that it has the advantages of simple implementation,convenience,flexibility and high integration.%研究Sigma-Delta(Σ-△)模型模数转换器(ADC)优化设计问题,提出了一种利用现场可编程门阵列(FPGA)芯片实现高精度AD转换的解决方法,利用FPGA自带的低压差分电压信号接口(LVDS),并配合芯片外围少量的阻容器件与片内的过采样数字滤波器设计可以实现二阶Σ-△型ADC的性能指标.通过在Matlab/Simulink环境中进行仿真,输出信号的信噪失真比(SNDR)达到-86.6dB,有效位数(ENOB)达到14位,并经EDA工具仿真验证了该方法的可实现性,证明提出的方法具有设计简单,实现方便灵活,集成度高等优点.