基于FPGA的变速跳频通信处理器的设计与实现

摘要

基于软件无线电体系结构,在传统常规跳频系统的基础上,引入变速跳频机制,设计了一种变速跳频系统方案.结合常规跳频系统的设计方法,完成了变速跳频系统中各关键模块的设计,并利用Xilinx公司推出的用于数字信号处理的系统生成器(system generator)设计工具,在现场可编程门阵列(FPGA)平台上对系统中的核心变速跳频通信处理器模块进行建模设计和仿真验证,仿真实验结果表明,该方案设计合理可行,对变速跳频系统的设计开发具有一定的参考价值.由于采用面向模型的开发工具System Generator,相比于传统的语言开发设计过程,可大大缩短开发周期,节约成本.%In the architecture of software defined radio (SDR) , a variable-rate frequency hopping system scheme is designed by introducing a variable-rate frequency hopping regime based on the conventional frequency hopping system. Combined with design methods of the conventional frequency hopping system, the key modules of the variable-rate frequency hopping system are designed. Moreover, the variable-rate frequency hopping communication processor that is the kernel module of the system is modeled and simulated on the FPGA platform by utilizing the tool of system generator that Xilinx company developed for digital signal processing. The simulation results show that this scheme is adequate and feasible and it helps the future development of the variable-rate frequency system. Since the model-oriented tool of System Generator is used, compared with the conventional language design procedure, it can greatly shorten the development cycle and save the cost.