Xilinx PCI- Express亥总线接口设计与实现

摘要

This paper introduces a PCI-Express bus based DMA hardware design, using Verilog HDL hardware description language for its implementation. Using the Xilinx FPGA Virtex-5 family of the design was verified, the result shows that this design readability, reliability and efficiency.%介绍了基于PCI- Express总线的DMA硬件设计,并运用硬件描述语言Verilog HDL对其实现.使用Xilinx公司Virtex-5系列FPGA对该设计进行了验证.结果表明,该设计能满足实际应用对可读性、可靠性及高效性的要求.