High-performance self-regulating self-biasing cascode current mirror.

摘要

Current Mirrors are one of the most important building blocks in Analog IC Design. They are widely used in all analog and mixed-signal devices. The most important goal in the design of these devices is the accuracy of the current replica. There exists some schemes of current mirrors that have different degrees of accuracy. This work focuses on the improvements of accuracy in one of the architectures of current mirrors by dynamic biasing and regulating the transistor sizes. Results obtained demonstrate that the offset error percent in this work is lower than 0.05%. This system also allows correction of errors introduced by processing. Simulations in Cadence are provided.