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Hardware Acceleration of Hashing Functions for Cryptocurrency Mining Using ZYNQ SoC

机译：使用ZYNQ SoC的加密货币挖掘哈希函数的硬件加速

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作者
Rajagopal, Vignesh;
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作者单位

Illinois Institute of Technology;

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授予单位 Illinois Institute of Technology;
学科
学位 M.S.
年度 2018
页码 66 p.
总页数 66
原文格式 PDF
正文语种 eng
中图分类
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2. Proficient Design Space Exploration of ZYNQ SoC using VIVADO Design Suite: Custom Design of High Performance AXI Interface for High speed data transfer between PL and DDR Memory using Hardware-Software Co-Design [J] . Rikin J. Nayak, Jaiminkumar B. Chavda International Journal of Applied Engineering Research . 2018,第11aPta2期

机译：使用Vivado设计套件熟练设计空间探索Zynq SoC：高性能AXI接口的定制设计，用于使用硬件 - 软件共同设计的PL和DDR内存高速数据传输
3. Zynq SoC based acceleration of the lattice Boltzmann method [J] . Xiaojun Zhai, Abbes Amira, Faycal Bensaali, Concurrency, practice and experience . 2019,第17期

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4. ECG Pattern Recognition and Beat Classification using Internet of Things and Hardware Acceleration on ZynQ (SOC) Platform with High Performance Computational PCIe Protocol [C] . Vijendra V., Meghana Kulkarni, Rajesh Murgan International Joint Conference on Biomedical Engineering Systems and Technologies . 2019

机译：ECG模式识别和使用高性能计算PCIe协议的Zynq（SoC）平台上的物联网和硬件加速度识别和击败分类
5. Design Flow of Advanced Encryption Standard Hardware Acceleration Using Zynq System-on-Chip [D] . Rarick, Samuel 2018

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6. A Fully Integrated Sensor SoC with Digital Calibration Hardware and Wireless Transceiver at 2.4 GHz [O] . Dong-Sun Kim, Sung-Joon Jang, Tae-Ho Hwang 2013

机译：具有2.4 GHz数字校准硬件和无线收发器的全集成传感器SoC
7. ECG Pattern Recognition and Beat Classification using Internet of Things and Hardware Acceleration on ZynQ (SOC) Platform with High Performance Computational PCIe Protocol [O] . Vijendra V., Meghana Kulkarni, Rajesh Murgan 2019

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Hardware Acceleration of Hashing Functions for Cryptocurrency Mining Using ZYNQ SoC

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