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Low-voltage continuous-time linear equalizer for digital video applications.

机译:用于数字视频应用的低压连续时间线性均衡器。

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摘要

This thesis presents a low-voltage continuous-time linear equalizer for the digital video application of 1080p HD video with a data rate of 3 Gbps. The equalizer was designed in the CMOS 45 nm technology with a supply voltage of 1V and bias current of 1.5 mA. The equalizer has a variable gain, which can be adjusted to suit the cable length and physical parameters. The circuit design of the equalizer filter includes a 3-stage filter, where each stage has been implemented as a variable gain amplifier along with a linear transconductance amplifier as a gain control stage. The equalizer is capable of compensating for the loss of a coaxial cable within the range 0-240 m in length, with each stage compensating for a cable of 80 m. The circuit design of the equalizer was implemented in the CMOS 45 nm technology in Cadence Virtuoso. The equalizer was also tested in Matlab, using the model of the coaxial cable to demonstrate the equalization of the data. The transient results of the equalized data, as well as the eye diagrams, are presented in this work.
机译:本文提出了一种用于数据速率为3 Gbps的1080p高清视频的数字视频应用的低压连续时间线性均衡器。均衡器采用CMOS 45 nm技术设计,电源电压为1V,偏置电流为1.5mA。均衡器具有可变增益,可以对其进行调整以适合电缆长度和物理参数。均衡器滤波器的电路设计包括一个三级滤波器,其中的每一级都已实现为可变增益放大器,而线性跨导放大器已实现为增益控制级。均衡器能够补偿长度在0-240 m范围内的同轴电缆的损耗,每级补偿80 m的电缆。均衡器的电路设计是在Cadence Virtuoso的CMOS 45 nm技术中实现的。还使用同轴电缆模型在Matlab中测试了均衡器,以演示数据均衡。这项工作介绍了均衡数据的瞬态结果以及眼图。

著录项

  • 作者

    Agale, Poonam V.;

  • 作者单位

    San Jose State University.;

  • 授予单位 San Jose State University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 M.S.
  • 年度 2014
  • 页码 86 p.
  • 总页数 86
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

  • 入库时间 2022-08-17 11:54:05

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