The design and implementation of a workbench for application specific message-passing parallel reconfigurable architectures.

摘要

This thesis develops a message-passing model for the design, simulation and evaluation of parallel reconfigurable architectures. A designer's workbench, OODRA (Object-Oriented Design of Reliable/Reconfigurable Architecture), has been implemented to realize the proposed message-passing model, and it provides a window-based, menu driven, graphics interactive environment for designing application-specific parallel architectures as well as the development of reconfiguration algorithms, the reliability analysis, and architectural level yield analysis. Applications of the workbench include the design and evaluation of an adaptive digital beamforming architecture, and the fast Fourier Transform algorithm running on a simulated Hypercube architecture.