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Design and performance analysis of a secure processor SCAN-SP with crypto-biometric capabilities.

机译:具有加密生物功能的安全处理器SCAN-SP的设计和性能分析。

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摘要

Secure computing is gaining importance in recent times as computing capability is increasingly becoming distributed and information is everywhere. Prevention of piracy and digital rights management has become very important. Information security is mandatory rather than an additional feature. Numerous software techniques have been proposed to provide certain level of copyright and intellectual property protection. Techniques like obfuscation attempt to transform the code into a form that is harder to reverse engineer. Tamper-proofing causes a program to malfunction when it detects that it has been modified. Software watermarking embeds copyright notice in the software code to allow the owners of the software to assert their intellectual property rights. The software techniques discourage software theft, can trace piracy, prove ownership, but cannot prevent copying itself. Thus, software based security firewalls and encryption is not completely safe from determined hackers. This necessitates the need for information security at the hardware level, where secure processors assume importance. In this dissertation, a detailed architecture and instruction set of the SCAN-Secure Processor is proposed. The SCAN-SP is a modified SparcV8 processor architecture with a new instruction set to handle image compression, encryption, information hiding based on SCAN methodology and biometric authentication based on Local Global Graph methodology. A SCAN based methodology for encryption and decryption of 32 bit instructions and data is proposed. The modules to support the new instructions are synthesized in reconfigurable logic and the results of FPGA synthesis are presented. The ultimate goal of the proposed work is a detailed study of the tradeoffs that exists between speed of execution and security of the processor. Designing a faster processor is not the goal of the proposed work, rather exploring the architecture to provide security is of prime importance.
机译:随着计算能力越来越分散并且信息无处不在,安全计算在最近变得越来越重要。防止盗版和数字版权管理已经变得非常重要。信息安全是强制性的,而不是附加功能。已经提出了许多软件技术来提供一定水平的版权和知识产权保护。混淆等技术试图将代码转换为难以逆向工程的形式。防篡改程序在检测到已被修改时会导致其故障。软件加水印将版权声明嵌入软件代码中,以允许软件所有者主张其知识产权。软件技术可以阻止软件盗窃,可以追踪盗版,证明所有权,但不能阻止自身复制。因此,基于软件的安全防火墙和加密对于确定的黑客而言并不完全安全。这就需要在硬件级别实现信息安全性,其中安全处理器至关重要。本文提出了SCAN安全处理器的详细架构和指令集。 SCAN-SP是经过修改的SparcV8处理器体系结构,具有新的指令集,可处理图像压缩,加密,基于SCAN方法的信息隐藏以及基于本地全局图方法的生物特征认证。提出了一种基于SCAN的方法来对32位指令和数据进行加密和解密。支持新指令的模块以可重新配置的逻辑进行综合,并给出了FPGA综合的结果。拟议工作的最终目标是对执行速度与处理器安全性之间的折衷进行详细研究。设计更快的处理器并不是所建议工作的目标,而是探索提供安全性的体系结构至关重要。

著录项

  • 作者

    Kannavara, Raghudeep.;

  • 作者单位

    Wright State University.;

  • 授予单位 Wright State University.;
  • 学科 Computer Science.
  • 学位 Ph.D.
  • 年度 2009
  • 页码 191 p.
  • 总页数 191
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

  • 入库时间 2022-08-17 11:37:43

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