Parallel implementation of a fast third-order Volterra digital filter.

摘要

The parallel implementation and performance evaluation of a fast third-order Volterra digital filtering algorithm are presented. To avoid three-dimensional convolution in the time domain, the filtering is carried in the frequency domain, which lends itself to parallel implementation. Our platform is an AT&T DSP-3 parallel processor. This advanced system allows us to focus on the parallelization of the Volterra filter algorithm without the expense of VLSI fabrication. Five different implementations are considered. The "time-skewing" method of parallel implementation, which has been used in linear digital filtering, is extended to frequency-domain nonlinear digital filtering. This method is currently the fastest. Speed-up results also indicate that the time-skewing implementations are efficient. An application to nonlinear communication channel equalization is presented.;The original contribution of this dissertation is the implementation of a fast third-order, as opposed to the more usual second-order, Volterra digital filter. This research is a significant step towards the practical realization and utilization of such a filter. Furthermore the lessons learned from implementation on the AT&T DSP-3 processor will prove very beneficial when we consider the ultimate design of a custom VLSI chip.