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Development of novel fabrication and simulation techniques for nanometer scale semiconductor photonic devices with application to nanophotodetector array.

机译:纳米级半导体光子器件的新型制造和仿真技术的开发及其在纳米光电探测器阵列中的应用。

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摘要

The possibility to realize an array of photodetectors with nanometer or subwavelength scale is of great interest to various technologies. For example, with such a photodetector array, it will enable us to image objects at a resolution better than that of conventional diffraction-limited imaging tool. However, the realization of such a nanoscale photodetector (NPD) array is challenging and requires various innovative nanofabrication and simulation techniques. This dissertation focuses on the development of nanofabrication and simulation techniques for nanometer scale semiconductor photonic devices and demonstrated the application of some of these techniques to the realization of NPD array.;In this dissertation, first, a novel sub-10-nm nanolithography technique using sol-gel derived spin-coatable ZrO2 and TiO2 resists is presented. We then demonstrated their applications to semiconductor nanoscale direct patterning, where the smallest etching feature obtained is as small as 9 nm.;Second, to realize 3-dimensional fabrication that is essential to NPD array realization, a series of nanofabrication techniques are developed. They include: e-beam lithography for nanoscale metallization and device patterning; BCB wafer bonding and subsequent polish and etch back techniques; dry etching techniques for sub-10-nm scale patterning; development of transparent conductive oxide (TCO) material with high conductivity to optical loss ratio of 1.5 S.;Third, to simulate NPD array, which cannot be effectively performed by conventional FDTD method, a newly developed MLME FDTD model is applied to the simulation of photo detection by photodetectors. The optical coupling effect between NPD pixels is explored by varying the width of NPD pixels and their spacing.;Finally, the realization of novel NPD array is demonstrated by applying some of the newly developed fabrication techniques to NPD device. Both slab and channel version NPD array with up to 4x4 array size are successfully realized, where the smallest NPD pixel fabricated is 100 nm wide with 100 nm spacing. The NPD pixel shows a photocurrent of ∼135 nA at 3 V bias for 1310 nm wavelength light. The corresponding dark current is ∼1.25 nA, which is more than 100 times lower than the registered photocurrent.
机译:实现具有纳米或亚波长规模的光电检测器阵列的可能性是各种技术的极大兴趣。例如,使用这种光电探测器阵列,将使我们能够以比常规衍射极限成像工具更好的分辨率对物体成像。但是,这种纳米级光电探测器(NPD)阵列的实现具有挑战性,并且需要各种创新的纳米加工和模拟技术。本论文着重研究纳米级半导体光子器件的纳米加工和仿真技术的发展,并论证了其中一些技术在实现NPD阵列中的应用。提出了溶胶-凝胶衍生的可旋转涂覆的ZrO2和TiO2抗蚀剂。然后,我们展示了它们在半导体纳米级直接图案化中的应用,其中最小的蚀刻特征小至9 nm。其次,为了实现对NPD阵列实现必不可少的3维制造,开发了一系列纳米制造技术。它们包括:用于纳米级金属化和器件图案化的电子束光刻; BCB晶圆键合以及随后的抛光和回蚀技术;干蚀刻技术,可用于低于10纳米的图形;开发高导电率对光损耗比为1.5 S的透明导电氧化物(TCO)材料;第三,为了模拟传统FDTD方法无法有效执行的NPD阵列,将新开发的MLME FDTD模型用于模拟由光电探测器进行光电检测。通过改变NPD像素的宽度及其间距来探索NPD像素之间的光耦合效应。最后,通过将一些新开发的制造技术应用于NPD器件,证明了新型NPD阵列的实现。平板和通道型NPD阵列都可以成功实现高达4x4的阵列尺寸,其中制造的最小NPD像素为100 nm宽,100 nm间距。 NPD像素在3V偏压下对1310 nm波长的光显示约135 nA的光电流。相应的暗电流约为1.25 nA,比记录的光电流低100倍以上。

著录项

  • 作者

    Liu, Boyang.;

  • 作者单位

    Northwestern University.;

  • 授予单位 Northwestern University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2009
  • 页码 187 p.
  • 总页数 187
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

  • 入库时间 2022-08-17 11:37:37

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