Analog circuit synthesis in an industrial design flow.

摘要

Mixed-signal designs are increasing in number as a large fraction of new ICs require an interface to the external, continuous-valued world. The digital blocks on these ICs can be attacked with modern, cell-based tools for synthesis, mapping, and physical design. Unfortunately, the analog portion is still routinely designed by hand, and it is often the time-to-market bottleneck because of the lack of automation tools.; The focus of this thesis is on analog circuit synthesis, which we define as performance driven sizing and biasing of the devices in a custom analog circuit. Past research has primarily addressed the synthesis of an analog cell, where a “cell” is an interconnection of 20 to 50 transistors, capacitors and other fundamental circuit devices. These experimental synthesis frameworks have not proven practical and effective enough to be accepted as an integral part of the industrial design process.; Analog synthesis tools have failed to migrate into mainstream use primarily because of the difficulties in reconciling the simplified models required for synthesis with the industrial simulation environments required for validation. The approach in this thesis is to leverage the same industrial simulation environment used ten validate analog circuits today. Our search strategies are efficient enough to allow full circuit simulation of each candidate design, and robust enough ten find good solutions for difficult circuits.