首页> 外文学位 >Implantation des reseaux de neurones sur FPGA pour la modelisation et la linearisation par predistorsion numerique des amplificateurs de puissance.
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Implantation des reseaux de neurones sur FPGA pour la modelisation et la linearisation par predistorsion numerique des amplificateurs de puissance.

机译:将神经网络植入FPGA上,以通过功率放大器的数字预失真进行建模和线性化。

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摘要

Nonlinearities and memory effects of power amplifiers (PA) in RF base stations distort signals in the bandwidth of wireless broadband modern communication systems. Among the linearization methods developed over the past two decades, digital predistortion (DPD) is becoming more and more important because it provides more stability and flexibility. Digital predistortion's popularity results from the computing power increases of systems with ASIC, DSP and FPGA chips. DSP chips are progressively replaced by FPGA chip because they are parallel and highly flexible in programming. The challenges of hardware implantation of any DPD technique reside in achieving the real-time processing while preserving the performance obtained with software models such as Matlab/Simulink software. Xilinx System Generator (XSG) is a high-level tool that uses Matlab/Simulink environment to program Xilinx FPGA chip. During co-simulating in XSG tool, code is executed on FPGA chip but data can be exchanged with Matlab software. The proposed architectures are used in the PA behavioral modeling before being applied to linearize them by digital predistortion. The real-valued time-delay neural network (RVTDNN) based on multi-layer perception (MLP), with time delay layers (TDL) is developed and compared with real-valued recurrent neural network (RVRNN) and nonlinear autoregressive with exogenous inputs (NARX) on which are added TDL layer at inputs and outputs. Optimizing maximum operating frequency (MOF) up to 156.128 MHz in pipelining architecture allowed their FPGA implantation by JTAG Hardware Co-simulation. In addition, a modulated 16-QAM baseband test signal, with 1.35 MHz bandwidth, is. used to validate the results. NARX-8-pse network corrects is other digital predistortion architectures in EVM parameter because it has 0.505 % in EVM parameter and it is better ACPR parameter on left (18.440 dB (decibels)) and on right (18.223 dB) reductions relative to Wiener PA model.
机译:RF基站中功率放大器(PA)的非线性和存储效应会使无线宽带现代通信系统的带宽中的信号失真。在过去的二十年中开发的线性化方法中,数字预失真(DPD)变得越来越重要,因为它提供了更高的稳定性和灵活性。数字预失真的流行是由于具有ASIC,DSP和FPGA芯片的系统的计算能力提高。 DSP芯片由于并行且编程高度灵活而逐渐被FPGA芯片取代。任何DPD技术的硬件植入所面临的挑战在于实现实时处理,同时保持通过Matlab / Simulink软件等软件模型获得的性能。 Xilinx系统生成器(XSG)是使用Matlab / Simulink环境对Xilinx FPGA芯片进行编程的高级工具。在XSG工具中进行协同仿真时,代码在FPGA芯片上执行,但可以与Matlab软件交换数据。所提出的体系结构先用于PA行为建模,然后再通过数字预失真将其线性化。开发了基于多层感知(MLP),具有时延层(TDL)的实值时延神经网络(RVTDNN),并将其与实值递归神经网络(RVRNN)和带有外源输入的非线性自回归进行比较( NARX),在输入和输出处添加了TDL层。通过优化流水线架构中的最高工作频率(MOF)高达156.128 MHz,可以通过JTAG硬件协同仿真来植入FPGA。此外,具有1.35 MHz带宽的调制16-QAM基带测试信号是。用于验证结果。 NARX-8位网络校正了EVM参数中的其他数字预失真体系结构,因为它的EVM参数中有0.505%,并且相对于Wiener PA而言,左(18.440 dB(分贝))和右(18.223 dB)的减小是更好的ACPR参数。模型。

著录项

  • 作者单位

    Universite du Quebec a Rimouski (Canada).;

  • 授予单位 Universite du Quebec a Rimouski (Canada).;
  • 学科 Electrical engineering.;Artificial intelligence.
  • 学位 M.Sc.A.
  • 年度 2013
  • 页码 204 p.
  • 总页数 204
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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