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Damage mechanics of Electromigration and Thermomigration in electronics packaging solder joints under time varying current loading.

机译:时变电流负载下电子封装焊点中电迁移和热迁移的破坏机理。

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摘要

The insatiable demand for miniaturization of consumer electronics has brought continuing challenges in the electronic packaging field. As a consequence, immense information processing duties, high current density and large joule heating are exerted on the package, which makes Electromigration (EM) and Thermomigration (TM) serious reliability issues. EM/TM failure results from many factors such as high current density, chemical potential, stress concentration and joule heating and etc. As a result, vacancy forms at the cathode side of conductors while mass accumulates at the anode side. Increased impedance, material fatigue, open and short circuit failures are related to this mass diffusion degradation mechanism. In this work, a multiphysical numerical model as well as experimental techniques have been developed to investigate failure mechanisms of flip-chip (FC) Ball Grid Array (BGA) package under time varying current loading.;In the experimental part, high frequency Pulse Direct Current (PDC) and Alternating Current (AC) electromigration degradation tests are carried out on Sn96.5%Ag3.0%Cu0.5 (SAC305- by weight) solder alloys. During the test, frequency, current density and duty factors are used as controlling parameters. The nominal current density is in 105 A/cm2 range, frequency in MHz range, and duty factor varied between 30% and 80% with a controlled ambient temperature at 70 °C. Skin effect due to time varying electromagnetic field is studied in this part. Failure of test vehicle follows Weibull's distribution. A new Mean Time to Failure (MTTF) model is developed to describe the lifetime of solder joints versus current density, frequency, duty cycle and temperature.;In addition to the experimental work, a set of thermo-electrical-mechanical coupled partial differential equations governing material degradation process during EM and TM is discretized numerically for Finite Element Analysis (FEA) purpose. The FEA model is formulated in FORTRAN and implemented to the commercial FEA package ABAQUS through UEL and UMAT user interface. Extensive simulations are performed to reveal the vacancy accumulation, stress and strain development, and damage evolution process of FC BGA package under time varying current loading: both AC and PDC. A few techniques are presented to alleviate EM and TM damage of FC BGA package.
机译:对消费电子产品的小型化的不满足需求在电子包装领域带来了持续的挑战。结果,在包装上施加了巨大的信息处理职责,高电流密度和较大的焦耳热,这使电迁移(EM)和热迁移(TM)成为严重的可靠性问题。 EM / TM故障是由许多因素引起的,例如高电流密度,化学势,应力集中和焦耳热等。结果,在导体的阴极侧会形成空位,而在阳极侧会聚集质量。阻抗增加,材料疲劳,断路和短路故障与这种质量扩散降解机制有关。在这项工作中,开发了一种多物理场数值模型和实验技术来研究倒装芯片(FC)球栅阵列(BGA)封装在时变电流负载下的失效机理。在实验部分,高频脉冲直接电流(PDC)和交流电(AC)电迁移降解测试是在Sn96.5%Ag3.0%Cu0.5(按重量计SAC305-)焊料合金上进行的。在测试过程中,频率,电流密度和占空比被用作控制参数。额定电流密度在105 A / cm2范围内,频率在MHz范围内,并且占空比在30%和80%之间变化,并且环境温度控制在70°C。在此部分中研究了由于时变电磁场引起的集肤效应。测试车辆的故障遵循Weibull的分布。开发了一个新的平均失效时间(MTTF)模型来描述焊点的寿命与电流密度,频率,占空比和温度之间的关系;除了实验工作外,还有一组热电-机械耦合的偏微分方程为了有限元分析(FEA)的目的,将控制EM和TM期间材料降解过程的数值离散化。 FEA模型是用FORTRAN制定的,并通过UEL和UMAT用户界面将其实现为商业FEA软件包ABAQUS。进行了广泛的仿真,以揭示在时变电流负载下(AC和PDC)FC BGA封装的空位积累,应力和应变发展以及损伤演变过程。提出了一些减轻FC BGA封装的EM和TM损坏的技术。

著录项

  • 作者

    Yao, Wei.;

  • 作者单位

    State University of New York at Buffalo.;

  • 授予单位 State University of New York at Buffalo.;
  • 学科 Applied Mechanics.;Engineering Electronics and Electrical.;Engineering Civil.
  • 学位 Ph.D.
  • 年度 2013
  • 页码 185 p.
  • 总页数 185
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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