声明
Acknowledgements
Abstract
Table of contents
Chapter 1 Introduction
1.1 Introduction
1.2 Balanced sampling plans avoiding adjacent units
1.3 Low power coding for crosstalk avoidance and error correction
1.4 Main results
Chapter 2 Codes,Graphs,Sequences,and Set systems
2.1 Codes
2.2 Graphs
2.3 Sequences
2.4 Set systems
Chapter 3 Optimal packing sampling plans avoiding units within distance two and three
3.1 Introduction
3.2 Constructions of BSA*(n,{2,3};α,t)
3.2.1 BSA*(n,{2,3};2,t)
3.2.2 BSA*(n,{2,3};3,t)
3.3 Optimal CPSAs and LPSAs for α=2
3.3.1 Optimal CPSA(n,3;2)s
3.3.2 Optimal LPSA(n,3;2)s
3.4 Optimal CPSAs and LPSAs for α=3
3.4.1 Optimal CPSA(n,3;3)s
3.4.2 Optimal LPSA(n,3;3)s
3.5 Conclusion
Chapter 4 New optimal error-correcting codes for crosstalk avoidance in on-chip data buses
4.1 Introduction
4.2 Constructions of BSA*(n,{2,3};2,t)
4.3 (n,4,3)-Ⅳ codes
4.4 Consclusion
Chapter 5 Summary and future work
5.1 Summary
5.2 Future work
References
Appendix
Research work conducted during PhD
中国科学技术大学;