An octave-range watt-level fully integrated CMOS switching power mixer array for linearization and back-off efficiency improvement

机译：倍频程瓦特级完全集成的CMOS开关功率混频器阵列，用于线性化和回退效率提高

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In this paper, a wideband watt-level fully-integrated CMOS power amplifier (PA) for non-constant modulation been demonstrated. The output currents of sixteen power mixer cores are combined at their drains, where the non-constant envelope RF signal is regenerated.

机译：在本文中，演示了用于非恒定调制的宽带瓦特级全集成CMOS功率放大器（PA）。十六个功率混合器内核的输出电流在其漏极处合并，在该处再生非恒定包络RF信号。

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来源
《Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009》|2009年|376-377377a|共3页
会议地点 San Francisco CA(US);San Francisco CA(US)
作者
Shouhei Kousai; Hajimiri A.;
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California Inst. of Technol., Pasadena, CA;

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原文格式 PDF
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关键词
CMOS digital integrated circuits; linearisation techniques; mixers (circuits); power amplifiers; CMOS power mixer array; RF signal; back-off efficiency; linearization; nonconstant modulation;

机译：CMOS数字集成电路;线性化技术;混频器（电路）;功率放大器; CMOS功率混频器阵列; RF信号;退避效率;线性化;非恒定调制;

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专利

1. Fully Integrated CMOS Power Amplifier With Efficiency Enhancement at Power Back-Off [J] . Liu G., Haldi P., Liu T.-J. K., IEEE Journal of Solid-State Circuits . 2008,第3期

机译：完全集成的CMOS功率放大器，可在功率回退时提高效率
2. Techniques for Power Dynamic Range and Back-Off Efficiency Improvement in CMOS Digitally Controlled Polar Transmitters [J] . Nakatani Toshifumi, Kimball Donald F., Asbeck Peter M. Microwave Theory and Techniques, IEEE Transactions on . 2016,第2期

机译：CMOS数控极性发送器中功率动态范围和退避效率提高的技术
3. A 28.3 mW PA-Closed Loop for Linearity and Efficiency Improvement Integrated in a $+$ 27.1 dBm WCDMA CMOS Power Amplifier [J] . Kousai S., Onizuka K., Yamaguchi T., Solid-State Circuits, IEEE Journal of . 2012,第12期

机译：集成在 $ + $ 27.1 dBm WCDMA CMOS功率放大器中的28.3 mW PA闭环，用于线性度和效率改善
4. An Octave-Range Watt-Level Fully integrated CMOS Switching Power Mixer Array for Linearization and Back-Off Efficiency Improvement [C] . Shouhei Kousai, Ali Hajimiri IEEE International Solid-State Circuits Conference . 2009

机译：八度范围的瓦特级全集成CMOS开关功率混频器阵列，用于线性化和备用效率改进
5. A Zero Voltage Switching Contour based Power Amplifier with Minimal Efficiency Degradation under Power Back-Off [D] . Singhal, Nitesh 2011

机译：基于零电压开关轮廓的功率放大器，在功率回退下具有最小的效率下降
6. Recording from defined populations of retinal ganglion cells using a high-density CMOS-integrated microelectrode array with real-time switchable electrode selection [O] . Michele Fiscella, Karl Farrow, Ian L. Jones, -1

机译：使用具有实时可切换电极选择的高密度CMOS集成的微电极阵列从定义的视网膜神经节细胞群体录制
7. An Octave-Range Watt-Level Fully Integrated CMOS Switching Power Mixer Array for Linearization and Back-Off Efficiency Improvement [O] . Kousai Shouhei, Hajimiri Ali 2009

机译：倍频程瓦特级全集成CMOS开关功率混频器阵列，可提高线性化和补偿效率

An octave-range watt-level fully integrated CMOS switching power mixer array for linearization and back-off efficiency improvement

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