2n-way jump microinstruction hardware and an effective instruction binding method

摘要

A scheme is developed by which multiway microprogram jumps may be made to any of 2n next possible microinstructions as a function of any selection of n 1 logically independent tests. An efficient method of binding microinstructions to memory locations allows this to be done at very low cost, both in terms of speed and hardware.

rn

Independent simultaneous tests are a necessity if horizontally microcodable machines are to continue to get wider, since algorithms presumably have fixed operations/tests ratios. This scheme will give parallelizers for such machines maximum flexibility in rearranging flow control.