首页> 外文会议>Photovoltaic Specialists Conference (PVSC), 2011 37th IEEE >Comparative study of PECVD deposited a-Si:H/SiNx:H double passivating layer on CZ crystalline si substrate
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Comparative study of PECVD deposited a-Si:H/SiNx:H double passivating layer on CZ crystalline si substrate

机译:在CZ晶体硅衬底上PECVD沉积a-Si:H / SiNx:H双钝化层的比较研究

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The effectiveness of hydrogenated amorphous layers for passivating crystalline silicon surfaces has been well documented in the literature for well over a decade. One limitation of such layers however has arison from their inability to withstand temperatures much above their deposition temperature without significant degradation. This limitation is of importance particularly with multicrystalline silicon materials where temperatures of at least 400°C are needed for effective hydrogenation of the crystallographic defects such as grain boundaries. To address this limitation, in this work the surface passivation quality and thermal stability of a-Si:H/SiNx:H passivating stack on p-type crystalline silicon wafers is studied for different deposition temperature of the capping SiNx:H layer. It is established that the as-deposited passivating quality of the stack highly depends on the deposition temperature of the SiNx:H layer and that the effectiveness of the passivation of the stack can be significantly enhanced after short term annealing at 400°C and even 450°C. It is also found there is an optimized a-SiNx:H deposition temperature for maximizing the effectiveness of both the surface passivation and stability of the amorphous silicon layer to elevated temperatures as high as 450°C for durations as long as 30 minutes. This provides the opportunity for such dielectric stacks to not only provide excellent surface passivation but to also participate as a hydrogen source for passivation of crystallographic defects within the silicon wafer at temperatures as high as 450°C, well above those normally able to be tolerated by surfaces passivated by amorphous silicon.
机译:十多年来,氢化非晶层钝化结晶硅表面的有效性已在文献中得到充分证明。然而,这种层的一个局限性在于它们不能承受远高于其沉积温度的温度而没有明显的劣化。该限制对于多晶硅材料尤其重要,在多晶硅材料中,至少需要400°C的温度才能有效地氢化晶体学缺陷(例如晶界)。为了解决该限制,在这项工作中,针对覆盖SiNx:H层的不同沉积温度,研究了p型晶体硅晶片上的a-Si:H / SiNx:H钝化叠层的表面钝化质量和热稳定性。可以确定的是,叠层的沉积钝化质量高度依赖于SiNx:H层的沉积温度,并且在400°C甚至450°C的短期退火后,叠层的钝化效率可以得到显着提高。 ℃。还发现存在优化的a-SiNx:H沉积温度,以最大化非晶硅层的表面钝化的有效性以及在长达450分钟的持续时间长达30分钟的高温下的稳定性。这为这种电介质叠层提供了机会,它不仅可以提供出色的表面钝化性能,而且还可以作为氢源,在高达450°C的温度下钝化硅晶片内的晶体缺陷,远高于正常情况下所能耐受的水平。被非晶硅钝化的表面。

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