AN Efficient Implementation Method of Fractal image COmpression on Dynamically Reconfigurable Architecture

摘要

This paper proposes a mehtod for implementing fractal image compressio on dynamically reconfigurable architecture. In the encoding of this compressio, metric computations among image blocks are the most time ocnsuming. In our method, processing elements configured ofr each image block perform these computations in a pipeline manner. By configuring PEs, we cn reduce the number of adders, which arethe main computing elements, by half even in the worst case. This rduction increases the number of PEs that work in parallel. In addition, dynamic reconfigurability fo hardeare is employed to omit useless metric computations. Experimental results show that the resources for implementing the PEs are reduced to 60 to 70