Realization of CMOS 0.18 μm Low Noise Amplifier for 2-5 GHz Using Cascode-Cascade Topology

摘要

The realized circuit is realized in 0.18 μm CMOS technology in ADS software for the frequency range of 2-5 GHz. Cascode topology is used to increase the gain of the circuits, as well as current reuse topology helps in reducing the power consumption of the circuit. Feedback topology helps in providing the stability of the circuit and cascade topology provides the reduction in noise figure at high frequency. The maximum value of the gain, i.e. S_(21) is measured to be 12.277 dB. Input reflection co-efficient, i.e. S_(11) is -15.789 dB at 2.520 GHz whereas the output reflection coefficient, i.e. S_(22) is -30.936 dB at 4.1 GHz and S_(12), i.e. the power reflection from port 2 to port 1, it's minimum value is -98.974 dB at 2 GHz. Noise figure minimum value is 2.440 dB at 2.863 GHz and the maximum value is 3.470 dB at 5 GHz.