首页> 外文会议>International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Micro Systems >Numerical Modeling of Electrical Resistance of Interconnections in High-Tech Multilayer PCBs Manufactured by Magnetron Sputtering Deposition of Copper
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Numerical Modeling of Electrical Resistance of Interconnections in High-Tech Multilayer PCBs Manufactured by Magnetron Sputtering Deposition of Copper

机译:磁控溅射沉积铜溅射沉积的高科技多层PCB互联电阻的数值模型

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摘要

In the paper, authors focus on application of numerical simulation methods along with the experimental measurements to access the electrical resistance of interconnections in PCB (Printed Circuit Board). The comparison of experimental and numerical results allow to define the design rules of interconnection properties and specification of interconnection and technology details depending on the selected application. Additionally, it is believed to allow course prediction of deposition process of conductive layer on via walls, without necessity of performing costly and time consuming experiments. In the paper authors present results and investigations which should lead to manufacture interconnections with aspect ratio (relation of via deep to via diameter) higher than 1, and diameter of via in the range of 25 to 150μm.
机译:在论文中,作者侧重于应用数值模拟方法以及实验测量,以进入PCB(印刷电路板)中互连的电阻。实验和数值结果的比较允许根据所选应用来定义互连属性的设计规则和互连和技术细节的规范。另外,据信允许通孔壁上的导电层的沉积过程的过程预测,而无需执行昂贵和耗时的实验。在纸质作者中,存在的结果和研究,该结果和研究应该导致纵横比(通过深度到Via直径的关系)制造互连,并且通过25至150μm的直径。

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