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Virtual component co-design-applying function architecture Co-design to automotive applications

机译:虚拟组件共同设计应用功能架构共设计到汽车应用程序

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System design is moving from a trial-and-error manual process towards a more rigorous and tool-supported approach. The driving junction for this move is the need to develop new products quickly, correctly and inexpensively. Time-to-market of four to six months are not uncommon today for some electronic systems. At the same time there is a need to leverage maximally what Deep Sub-Micron (DSM) technology has to offer to compete. Hence an approach that has design re-use as its main goal has great potential to increase productivity of the industry as a whole. The basic tenets of the design methodology have been incorporated into the Cadence VCC environment for Virtual Component Co-Design. They are function-architecture co-design, mapping of functions to flexible and programmable architectures, and efficient and automatic implementation of actual code on the programmable components of the architecture. This paper will illustrate these principles using the automotive applications as an example. Besides the different steps of the actual function architecture codesign methodology we will show and summarize the lessons learned from design projects. We will outline how it has been possible to capture junctions and candidate architectures and how the mapping of the junctions to the candidate architectures can be carried out very quickly so as to converge to an "optimal" solution effectively and in a few iterations.
机译:系统设计正在从试验和错误手动过程转变为更严格和更具工具支持的方法。此举的驾驶结是需要快速,正确且廉价地开发新产品。对于某些电子系统,4至六个月的上市时间并不少见。与此同时,需要最大限度地利用深层亚微米(DSM)技术来竞争。因此,一种设计重新使用的方法,因为其主要目标具有巨大的潜力,可以提高整个行业的生产力。设计方法的基本原则已被纳入Cadence VCC环境,用于虚拟组件共同设计。它们是功能架构协同设计,函数的映射到灵活和可编程架构,以及架构的可编程组件上的实际代码的高效实现。本文将使用汽车应用作为示例说明这些原理。除了实际功能架构的不同步骤外,我们将显示和总结从设计项目中吸取的经验教训。我们将概述如何捕获结符和候选架构以及如何非常快速地执行结合与候选架构的连接映射,以便有效地融合到“最佳”解决方案中,并且在几个迭代中汇聚到“最佳”解决方案。

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