首页> 外文会议>International Symposium on Cleaning and Surface Conditioning Technology in Semiconductor Device Manufacturing >SELECTION OF POST PLASMA ETCH/ASH CLEANING METHODS USING A RESIDUE REMOVAL MODEL FOR INTEGRATED CIRCUITS BASED ON RESIDUE ELEMENTAL COMPOSITION
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SELECTION OF POST PLASMA ETCH/ASH CLEANING METHODS USING A RESIDUE REMOVAL MODEL FOR INTEGRATED CIRCUITS BASED ON RESIDUE ELEMENTAL COMPOSITION

机译:基于残留物元素组成的集成电路的残留型去除模型选择后等离子体蚀刻/灰料清洁方法的选择

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A "Residue Removal Model" was developed to identify the best formulations for removing residues remaining on integrated circuits after plasma etch/ash processes. Auger Electron Spectroscopy (AES) coupled with metal and dielectric etch-rates determined for Al, Ti and SiO_2 led to a useful model. The model suggests that: 1) the composition of a cleaning formulation must be matched to the elemental composition of the residue, and 2) relatively high Al, Ti and SiO_2 etch-rates are required for successful residue removal, but must be balanced against underlying material etching. "Radar Plots" were used to compare various residue removal formulations.
机译:开发了一种“残留的去除模型”以确定等离子体蚀刻/灰分过程后除去残留在集成电路上的残留物的最佳配方。螺旋钻电子光谱(AES)与用于Al,Ti和SiO_2确定的金属和介电蚀刻速率,LED为一个有用的模型。该模型表明:1)清洁制剂的组成必须与残余物的元素组成匹配,2)相对高的Al,Ti和SiO_2蚀刻速率是成功的残留物去除,但必须与下面的均衡材料蚀刻。 “雷达图”用于比较各种残留的去除制剂。

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