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Design of Power Efficient FPGA based Hardware Accelerators for Financial Applications

机译:基于FPGA的金融应用的功率高效的硬件加速器设计

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Using Field Programmable Gate Arrays (FPGAs) to accelerate financial derivative calculations is becoming very common. In this work, we implement an FPGA-based specific processor for European option pricing using Monte Carlo simulations, and we compare its performance and power dissipation to the execution on a CPU. The experimental results show that impressive results, in terms of speed-up and energy savings, can be obtained by using FPGA-based accelerators at expenses of a longer development time.
机译:使用现场可编程门阵列(FPGA)加速金融衍生物计算变得非常普遍。在这项工作中,我们使用Monte Carlo仿真实现了一个基于FPGA的特定处理器,用于使用Monte Carlo仿真进行比较其对CPU执行执行的性能和功耗。实验结果表明,通过在更长的开发时间的费用下使用基于FPGA的加速器,可以获得令人印象深刻的结果。

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