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An Operational Amplifier for High Performance Pipelined ADCs in 65nm CMOS

机译:用于65nm CMOS的高性能流水线ADC的运算放大器

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A CMOS fully differential high gain-bandwidth (GBW) product operational amplifier (OpAmp) is presented in this paper. In order to achieve a high gain, the Nested gain-boosting technique [1] is employed. The design is implemented in a 1.1V standard 65nm CMOS process. The DC-gain of the OpAmp is larger than 77.9dB with the unity-gain frequency of 4.61GHz while achieving 76.2 degrees of phase margin (PM). Applying the maximum input swing, the output signal settles to 0.01% accuracy in less than 3.8ns. The output total harmonic distortion (THD) of the OpAmp is 0.586% for maximum signal swing at the frequencies near Nyquist frequency with the input-referred noise of 5.4nV/√_(Hz-) The high GBW product of this design makes it suitable for 12-bit 200MS/s pipelined ADC applications.
机译:本文提出了CMOS全差分高增益带宽(GBW)产品运算放大器(OPAMP)。为了实现高增益,采用嵌套增益升压技术[1]。该设计以1.1V标准的65nm CMOS工艺实现。 opamp的直流增益大于77.9dB,单位增益频率为4.61GHz,同时实现76.2度的相位余量(PM)。应用最大输入摆动,输出信号在小于3.8ns的少于0.01%的精度。 OPAMP的输出总谐波失真(THD)为奈奎斯特频率附近的频率的最大信号摆幅为0.586%,输入引用噪声为5.4nv /√_(hz-),这种设计的高GBW产品使其适合对于12位200ms / s流水线ADC应用。

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