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Finite element stress analysis of an multi-chip package by Taguchi design of experiments for package component thicknesses

机译:TaguChi封装组件厚度实验设计的多芯片封装有限元应力分析

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Slacked multi-chip package (MCP) has been an increasingly important approach for realizing high-density 3D packaging. To accommodate multiple chips within a standard package height with adequate integrity and reliability puts stringent demands on wafer thinning technology, as well as on assembly process technology. In this work, internal stress distribution and package warpage in MCP originated from process thermal load have been systematically investigated as functions of all structure parameters by finite element analysis (FEA) and Taguchi design of experiments (DOE). It is found that top die is the easiest to crack under thermal stress. The maximum stress in this die can be effectively relieved by increasing its thickness and/or by decreasing the thickness of die attach underneath. Shear stress at each interface depends negatively on the corresponding die attach thickness, while top-surface warpage can be controlled by mould compound thickness above top die.
机译:储存多芯片封装(MCP)是实现高密度3D包装的越来越重要的方法。为了在标准封装高度内容纳多个芯片,具有足够的完整性和可靠性,请对晶圆减薄技术以及装配过程技术进行严格要求。在这项工作中,通过有限元分析(FEA)和实验(DOE)设计,通过有限元分析(FEA)和Taguchi设计,系统地研究了从过程热负荷的MCP中的内部应力分布和包装翘曲。结果发现,顶部模具是在热应力下最容易破裂的。通过增加其厚度和/或通过降低下面的模具厚度可以有效地减轻该模具中的最大应力。每个界面处的剪切应力取决于相应的管芯附着厚度,而顶表面翘曲可以通过顶部模具上方的模具化合物厚度来控制。

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