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Probabilistic Power Estimation for Digital Signal Processing Architectures

机译:数字信号处理架构的概率功率估计

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摘要

A method for estimating the power on architecture-level is described. Originally based on simulations with data sequences, the method is extended by as simulation-free approach. The statistical properties required for the underlying Dual-Bit-Type model are propagated through the circuit. The necessary computation formulas are presented. For both approaches, the model accuracy for base modules as for signal processing applications is comparably low.
机译:描述了一种用于估计架构级电源的方法。最初基于使用数据序列的模拟,该方法通过无模拟方法扩展。基础双位式模型所需的统计特性通过电路传播。提出了必要的计算公式。对于两种方法,基本模块的模型精度为信号处理应用相当低。

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