Plasma charging in NMOSFET due to forward and reverse-biased source and drain junctions during metal-1 etching

摘要

Plasma etching of metal-1 is critical in CMOS technology as source and drain of the transistor are already formed and are in contact with metal-1 antenna. In this work, we investigate the effect of source and drain junctions on gate oxide damage due to plasma processing-induced wafer charging during or after metal-1 etching. When the junctions are reverse biased, during substrate injection, the damage is higher. During gate injection, on the other hand, the gate oxide damage is significantly reduced once the source and drain junctions become forward-biased. Transistor threshold voltage, subthreshold swing and hot carrier lifetime measurements confirm this behavior.