首页> 外文会议>Electromagnetic Compatibility Symposium Record, 1968 IEEE >Substrate fed logic - An improved form of injection logic
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Substrate fed logic - An improved form of injection logic

机译:基板馈电逻辑-注入逻辑的一种改进形式

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A novel form of integrated injection logic is described which has significant advantages over its conventional counterpart in packing density and power-delay product. The structure is formed from two epitaxial layers on a heavily doped p type sub-strate. The p type epitaxial layer, which forms the base of the npn transistor, is lightly doped, allowing the fabrication of Schottky contacts. This gives rise to an extremely powerful multi-input, multi-output logic element on a single base land. The fundamental SFL structure has been successfully demonstrated. Gates and a ring oscillator have been operated and a reduction in power-delay product has been shown. A viable technology for Schottky Barrier Diodes has been demonstrated and an optimised structure has been designed.
机译:描述了一种新的集成喷射逻辑形式,其在填充密度和动力延迟产品中的传统对应物中具有显着的优点。该结构由两个外延层形成,在重掺杂的p型亚弦上。形成NPN晶体管基部的P型外延层被轻微掺杂,允许肖特基触点的制造。这导致单个基地上的一个极其强大的多输入多输出逻辑元件。基本的SFL结构已成功显示。已经操作了栅极和环形振荡器,并且已经示出了功率延迟产品的减少。已经证明了一种可用于肖特基势垒二极管的可行技术,并设计了优化的结构。

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