Differential Power Analysis Immune Design of FinFET Based Novel Differential Logic Gate

摘要

Differential Power analysis (DPA) method is frequently used for non-invasive side-channel attack to hack into the system. This paper proposes a novel DPA attack immune design of FinFET based logic gates which show dense distribution of autocorrelation with salience strength of 38.11%. The proposed design has highly regular structure with exactly similar evaluation path for both differential outputs, AND-NAND, and OR-NOR which can be easily extended for n-bit inputs. The design effort is minimal as proposed structure is such that AND-NAND design can be used to obtain OR-NOR function by just changing the placement of inputs. These gates take 40 ps to evaluate the logic and consume 4.69 μ W/cycle. The designs are simulated using Symica Custom IC Design toolkit with ASAP7-7nm FinFET Low Threshold Voltage (LVT) technology with power supply of 700 mV.