Load Buffering Technique Development Utilizing Power-Hardware-in-The-Loop

摘要

The load buffering development and evaluation effort is an investigation of the feasibility and evaluation of the risk to implementing load buffering techniques for future shipboard power distribution systems. This is implemented through modeling, simulation and Real Time (RT) Power Hardware-in-the-Loop (PHIL) testing to ensure operational stability and power quality of the power system. In this study the power system utilizes a gas turbine generator as the prime power source. The purpose of load buffering is to mainly ease the dynamic transient encumbrance on the gas turbine generator due to high energy and high power stochastic pulse loading. Preliminary load buffering control methods were developed and implemented on reduced-scale laboratory power electronics hardware. Three different pulsed load scenarios were profiled and their corresponding buffering controllers were developed based on classical control theory. The test results have been assessed and clearly show the effectiveness of the load buffering method approach. This paper discusses the details of the implementations and presents preliminary results from simulations with and without buffering schemes using Power-Hardware-in-the-Loop implementation.