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The light behavior from Shallow Trench Isolation profiles at Chemical Mechanical Planarization step and correlation with optical endpoint system by interferometry

机译:化学机械平面化步骤中浅沟槽隔离轮廓的光行为以及通过干涉术与光学端点系统的相关性

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In the semiconductor manufacturing, the control of Chemical-Mechanical Planarization (CMP) process time for Shallow Trench Isolation (STI) is important. A wafer under- or over-polishing causes leakage and short-circuits making the chips defective. The CMP process control by interferometry is one of the most used systems to monitor the polishing time. In some cases, the interferometry process control is not possible because the wafer patterns cause some unwanted effects such as scattering, diffraction, and absorption. Consequently the signal is affected. In this paper, we apply a theoretical and experimental approach on the light reflected from different STI stacks in order to interpret the observed optical phenomenon. The experimental study is done to get close to the light measurement conditions within the manufacturing environment. With this experiment, we evidence that the trench pattern inside memory zones is responsible for the diffraction effect on the signal. In a production environment, this pattern results in a lower measured intensity when the size of memory area increases. Besides, numerical calculations are performed based on differential method in order to predict the diffracted intensity, which depends on the chip design parameters and the incident wavelengths tuning. By using STI models, this method helps to determine the wavelengths with the highest reflected intensity.
机译:在半导体制造中,控制浅沟槽隔离(STI)的化学机械平面化(CMP)工艺时间非常重要。晶片抛光不足或过度抛光会导致泄漏和短路,从而导致芯片损坏。通过干涉测量法进行的CMP工艺控制是最常用的监测抛光时间的系统之一。在某些情况下,干涉测量过程的控制是不可能的,因为晶片图案会引起一些不良影响,例如散射,衍射和吸收。因此,信号受到影响。在本文中,我们对不同的STI堆栈反射的光应用理论和实验方法,以解释观察到的光学现象。进行实验研究是为了接近制造环境中的测光条件。通过该实验,我们证明了存储区内部的沟槽图案是信号上衍射效应的原因。在生产环境中,当存储区域的大小增加时,此模式将导致较低的测量强度。此外,基于微分方法进行数值计算以预测衍射强度,这取决于芯片设计参数和入射波长的调整。通过使用STI模型,此方法有助于确定反射强度最高的波长。

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