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Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level

机译:结构故障的有效仿真,用于系统级的可靠性评估

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In recent technology nodes, reliability is considered a part of the standard design ¿ow at all levels of embedded system design. While techniques that use only low-level models at gate- and register transfer-level offer high accuracy, they are too inefficient to consider the overall application of the embedded system. Multi-level models with high abstraction are essential to efficiently evaluate the impact of physical defects on the system. This paper provides a methodology that leverages state-of-the-art techniques for efficient fault simulation of structural faults together with transaction-level modeling. This way it is possible to accurately evaluate the impact of the faults on the entire hardware/software system. A case study of a system consisting of hardware and software for image compression and data encryption is presented and the method is compared to a standard gate/RT mixed-level approach.
机译:在最近的技术节点中,可靠性被认为是标准设计的一部分Ã,¿在所有级别的嵌入式系统设计中。虽然仅在栅极和寄存器传输级别的低级模型使用的技术提供高精度,但它们的效率太低,无法考虑嵌入式系统的整体应用。具有高抽象的多级模型对于有效地评估物理缺陷对系统的影响至关重要。本文提供了一种利用最先进技术的方法,以便与交易级模型一起利用结构故障的有效故障模拟。这样可以准确地评估故障对整个硬件/软件系统的影响。提出了一种由用于图像压缩和数据加密的硬件和软件组成的系统的案例研究,并将该方法与标准门/ RT混合级方法进行比较。

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