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Design and realization of the hardware platform based on the Nios soft-core processor

机译:基于Nios软核处理器的硬件平台的设计与实现

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Programmability and flexibility are the trend of current electronic system. The Nios, a soft-core processor integrated in a FPGA chip, is characterized by its flexibility and programmability. Since its introduction in June 2000, Altera’s Nios soft-core processor has rapidly been integrated in a wide range of applications. In this paper, design and realization of the hardware platform based on the Nios soft-core processor is discussed. The basic architecture and characteristics of the Nios soft-core processor are studied first. Then, on analyzing the requirement of the platform, the holistic design scheme of the hardware platform is given. The hardware platform consists of several functional blocks such as power, clocking, FPGA device, RS232 serial port, 10/100 Base-T Ethernet Port, memory, connector. The design of each functional block is presented in detail. Furthermore, some layout practices are pointed out. By practical rigorous test, the schematic circuit diagram is proved to be correct and the hardware platform is proved to be reliable and stable. This hardware platform is of great use in controlling and monitoring systems.
机译:可编程性和灵活性是当前电子系统的趋势。 Nios是集成在FPGA芯片中的软核处理器,其特点是灵活性和可编程性。自2000年6月推出以来,Altera的Nios软核处理器已迅速集成到各种应用中。本文讨论了基于Nios软核处理器的硬件平台的设计与实现。首先研究Nios软核处理器的基本架构和特性。然后,在分析平台需求的基础上,给出了硬件平台的整体设计方案。硬件平台由几个功能块组成,例如电源,时钟,FPGA器件,RS232串行端口,10/100 Base-T以太网端口,存储器,连接器。详细介绍了每个功能块的设计。此外,指出了一些布局实践。经过实际的严格测试,电路原理图是正确的,硬件平台是可靠,稳定的。该硬件平台在控制和监视系统中很有用。

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