Issues in NiSi-gated FDSOI device integration

机译：NiSi门控FDSOI设备集成中的问题

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Thin-body fully depleted silicon on insulator (FDSOI) devices with NiSi metal gates were fabricated with gate lengths down to 20 nm. Specific issues in the integration of the NiSi-gated FDSOI devices were investigated, in particular: gate CMP, the phase stability of the nickel silicide, and parasitic resistance.

机译：采用栅极长度低至20 nm的具有NiSi金属栅极的薄体完全耗尽绝缘体上硅（FDSOI）器件。研究了NiSi门控FDSOI器件集成中的特定问题，特别是：栅极CMP，硅化镍的相稳定性和寄生电阻。

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《Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International》|2003年|p.18.4.1-18.4.4|共4页
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Kedzierski J.; Boyd D.; Ying Zhang; Steen M.; Jamin F.F.; Benedict J.; Meikei Ieong; Haensch W.;
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中图分类无线电电子学、电信技术;
关键词
silicon-on-insulator; nickel compounds; chemical mechanical polishing; NiSi-gated FDSOI device integration; SOI; thin-body FDSOI; fully depleted silicon on insulator devices; gate length; gate CMP; nickel silicide phase stability; parasitic resistance; 2;

机译：绝缘体上硅;镍化合物;化学机械抛光; NiSi门控FDSOI器件集成; SOI;薄体FDSOI;绝缘体器件上完全耗尽的硅;栅极长度;栅极CMP;硅化镍相稳定性;寄生电阻; 2;

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2. Multisubband Ensemble Monte Carlo Analysis of Tunneling Leakage Mechanisms in Ultrascaled FDSOI, DGSOI, and FinFET Devices [J] . Medina-Bailon Cristina, Padilla Jose L., Sadi Toufik, IEEE Transactions on Electron Devices . 2019,第3期

机译：超小型FDSOI，DGSOI和FinFET器件中隧道泄漏机理的多子带集成蒙特卡罗分析
3. Source-to-Drain Tunneling Analysis in FDSOI, DGSOI, and FinFET Devices by Means of Multisubband Ensemble Monte Carlo [J] . Cristina Medina-Bailon, José L. Padilla, Carlos Sampedro, Electron Devices, IEEE Transactions on . 2018,第11期

机译：FDSOI，DGSOI和FinFET器件中的源-漏隧穿分析，通过多子带集成Monte Carlo进行
4. Issues in NiSi-gated FDSOI device integration [C] . Jakub Kedzierski, Diane Boyd, Ying Zhang, IEEE International Electron Devices Meeting . 2003

机译：NISI门控FDSOI设备集成的问题
5. Device design and transport issues in nitride and ferroelectric heterostructure devices. [D] . Zhang, Yifei. 2000

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Issues in NiSi-gated FDSOI device integration

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