Comprehensive study and corresponding improvements on the ESD robustness of different nLDMOS devices

摘要

Four-terminal and three-terminal asymmetrical n-type LDMOS (asym-nLDMOS) devices are investigated in 0.18μm 40V SOI BCD technology. To improve normal asym-nLDMOS devices ESD robustness, an additional p-sink implant is added beneath their source/drain diffusion regions. Transmission line pulse measured results show that the novel asym-nLDMOS devices have a suitable triggering voltage and 30–48% improvement of second breakdown current.