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Implementation of active floating inductor based on second generation current conveyor for on chip voltage regulator

机译:基于第二代电流传输器的有源浮动电感片上稳压器的实现

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This paper presents a floating inductor implementation technique using active components. Floating inductor is an integral part of switching voltage regulator. Implementation of floating inductor is a primary bottleneck of on-chip implementation of switching regulator. In current CMOS circuit design, the implementation of the passive inductor is either external to the chip or fabricated as a part of the package. If it is incorporated within the chip, the passive inductor occupies very large chip area. In addition, passive inductors are not electrically tunable, which makes them unattractive for reconfigurable system-on-a-chip (SOC) designs. In contrast, an active device based floating inductor can be inserted within the chip. This new approach adapts the use of both positive and negative current conveyors. The proposed circuit allows the inductance value to be adjusted electronically by changing the bias current Io of the current conveyor. Design of the circuit is demonstrated using 0.5µm technology on Cadence Virtuoso with a +3.3V supply voltage. Simulation results are provided to verify the proposed design. Also, the design can be tuned further for nanoscale environment.
机译:本文提出了一种使用有源元件的浮动电感器实现技术。浮动电感器是开关稳压器不可或缺的一部分。浮动电感器的实现是开关稳压器片上实现的主要瓶颈。在当前的CMOS电路设计中,无源电感器的实现要么在芯片外部,要么制造为封装的一部分。如果将其集成在芯片中,则无源电感器会占用很大的芯片面积。此外,无源电感器不能进行电调谐,这使其对于可重新配置的片上系统(SOC)设计没有吸引力。相反,可以将基于有源器件的浮动电感器插入芯片内。这种新方法适用于正电流输送机和负电流输送机。所提出的电路允许通过改变电流传送器的偏置电流Io来电子地调节电感值。该电路的设计在Cadence Virtuoso上使用0.5µm技术进行演示,电源电压为+ 3.3V。提供仿真结果以验证所提出的设计。而且,可以针对纳米级环境进一步调整设计。

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