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A Novel Array Architecture and Routing Structure for Massive-MIMO Detection in Coarse-Grained Reconfigurable Architecture Platform

机译:一种新型阵列架构和用于粗大粒度可重构架构平台的MIMO检测的路由结构

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摘要

Based on the data flow feature analysis of the MIMO detection algorithms, a more efficient array architecture and a multi-hierarchical routing structure are proposed in the Coarse-Grained Reconfigurable Architecture platform, named Reconfigurable Signal Processor 2.0 (RaSP2.0) in this paper. The proposed design with higher throughput requires less hardware resource and has more efficient routing structure when compared with the first generation of RaSP. Implemented in TSMC 40nm technology, the single core of RaSP2.0 occupies 1.02 mm~2 and is capable of running at 500MHz. The experimental results show that the area of RaSP2.0 reduces 63% compared with RaSP when normalized to 96-order matrix inversion operation. The hardware efficiency of QR decomposition (QRD) operation in the case of 4×4 matrix is improved by 1~3.17 times than the other architectures. In addition, the RaSP2.0 can realize the 96-order matrix inversion operation via only one single mapping, which can provide higher throughput.
机译:基于MIMO检测算法的数据流特征分析,在本文中的粗粒可重新配置架构平台中提出了一种更有效的阵列架构和多层次路由结构,名为Incremfigutible信号处理器2.0(Rasp2.0)。吞吐量较高的建议设计需要更少的硬件资源,并且与第一代RASP相比时具有更高效的路由结构。在TSMC 40nm技术中实现,RASP2.0的单个核心占用1.02 mm〜2,并且能够以500MHz运行。实验结果表明,与96阶矩阵反转操作标准化时,RASP2.0的面积与RASP相比减少了63%。在4×4矩阵的情况下,QR分解(QRD)操作的硬件效率提高了比其他架构的1〜3.17倍。另外,RASP2.0可以通过仅通过单个映射实现96阶矩阵反转操作,该映射可以提供更高的吞吐量。

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