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On-Chip Analog Circuit Diagnosis in Systems-on-Chip Integration

机译:片上系统集成中的片上模拟电路诊断

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A highly multi-channel on-chip signal monitor establishes analog circuit diagnosis against environmental disturbances in SoCs. A 0.18-mum CMOS experimental on-chip test bench embeds an array of 53 distributed probes followed by a single shared waveform acquisition kernel, enabling on- and off-chip cooperative high-throughput digitization of 330 ms per sample point with adaptive 10-bit timing and voltage resolutions at the minimum LSB of 100 ps and 400 V. Analog signals of interest in a 1.5-bit conversion stage of pipeline ADC are evaluated in terms of their response to substrate noises globally existing in a chip. Through this on-chip diagnosis we derive in-depth findings relating to dynamic, large-signal, and sensitive behaviors of analog circuits in a real SoC environment, far beyond simulations with inevitably limited capacity
机译:高度多通道的片上信号监控器可针对SoC中的环境干扰建立模拟电路诊断。一个0.18微米CMOS实验片上测试台嵌入了53个分布式探头的阵列,随后是一个共享的波形采集内核,从而使片上和片外协作高通量数字化每个采样点达到330毫秒,并具有自适应10位最小LSB为100 ps和400 V时的最大时序和电压分辨率。流水线ADC的1.5位转换级中感兴趣的模拟信号是根据其对芯片中普遍存在的基板噪声的响应进行评估的。通过此片上诊断,我们得出了与真实SoC环境中模拟电路的动态,大信号和敏感行为有关的深入发现,远远超出了不可避免的容量有限的模拟

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