首页> 外文会议> >Design-oriented substrate noise coupling macromodels for heavily doped CMOS processes
【24h】

Design-oriented substrate noise coupling macromodels for heavily doped CMOS processes

机译:重掺杂CMOS工艺的面向设计的基板噪声耦合宏模型

获取原文
获取外文期刊封面目录资料

摘要

Macromodels for substrate noise coupling in heavily doped substrates have been developed. These models are simple and express the substrate coupling directly as a function of the spacing between the injection and sensing contacts. The models require only six parameters that can be readily extracted from a few device simulations and measurements. The model is validated for a 2 /spl mu/m and a 0.5 /spl mu/m CMOS process where it is shown that the simple model predicts the noise coupling accurately.
机译:已经开发出用于在重掺杂衬底中耦合衬底噪声的宏模型。这些模型很简单,并直接将基板耦合表示为注入和感应触点之间的间距的函数。该模型仅需要六个参数,可以从一些设备仿真和测量中轻松提取出这些参数。该模型针对2 / spl mu / m和0.5 / spl mu / m CMOS工艺进行了验证,其中表明简单模型可以准确预测噪声耦合。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号