A bipolar semi-custom PLL-based synthesizer for GSM and DCS systems

摘要

A versatile synthesizer chip capable of operating with an output signal of up to 2 GHz and a reference signal of up to 20 MHz was designed in MAXIM's GST-2 Process using QuickChip-960D transistor array. The circuit includes the basic building blocks of a complete PLL-based synthesizer except for the VCO and the loop filter. The chip has an internal dual modulus prescaler operating in 8/9 or 16/17 mode. The circuit has a 10 bit M counter and a 4 bit pulse swallow counter and a phase-frequency detector. The level of the PFD output can be set externally from 0.5 mA to 5.0 mA. Depending on the PFD output level, the circuit uses from 90 mA to 122 mA from a 5 V supply. The differences between the full custom and semi-custom design processes are discussed and attention is paid to the minimization of device usage.